Combinatorial PVD and ALD workflows for cost-effective R&D.
In: Solid State Technology, Jg. 52 (2009-03-01), Heft 3, S. 26-30
Online
academicJournal
Zugriff:
The article focuses on the importance of High Productivity Combinatorial (HPC) technology in research and development of semiconductor industry in the U.S. The HPC has been intended to find faster and cost-efficient optimum solutions with the use of the combinatorial approaches and application driven workflows. These workflows uses the physical vapor deposition (PVD) to test the material properties of chalcogenide alloy. Moreover, the atomic layer deposition (ALD) is for logic transistors.
| Titel: |
Combinatorial PVD and ALD workflows for cost-effective R&D.
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| Autor/in / Beteiligte Person: | Hashim, Imran ; Mathur, Monica ; Phatak, Prashant ; Kuse, Ron ; Malhotra, Sandra ; Barstow, Sean ; Shanker, Sunil ; Chiang, Tony |
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| Zeitschrift: | Solid State Technology, Jg. 52 (2009-03-01), Heft 3, S. 26-30 |
| Veröffentlichung: | 2009 |
| Medientyp: | academicJournal |
| ISSN: | 0038-111X (print) |
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